Aaeon EMB-A50M Manual de usuario descargar pdf (Pagina 38)

Mini-ITX EMB-A50M

Appendix A Programming the Watchdog Timer A-2

A.1 Programming

EMB-A50M utilizes ITE 8771E chipset as its watchdog

timer controller. Below are the procedures to complete its

configuration and the AAEON initial watchdog timer

program is also attached based on which you can

develop a customized program to fit your application.

Configuring Sequence Description

After the hardware reset or power-on reset, the ITE 8771E enters

the normal mode with all logical devices disabled

except KBC. The initial state (enable bit ) of this logical device

(KBC) is determined by the state of pin 121 (DTR1#) at the falling

edge of the system reset during power-on reset.

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Aaeon EMB-A50M Manual de usuario Pagina 38